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AMD’s 2026 Advancing AI event prioritized scale and openness, debuting the CDNA 5-based MI455X GPU, 72-GPU Helios rack system, and 6th-Gen EPYC Venice CPUs. This analysis covers the MI455X and Helios platform, with Venice CPU details in a dedicated article.
The MI455X features 432GB HBM4 memory — 50% more than NVIDIA’s Rubin/B300 288GB — 23.3TB/s memory bandwidth and 40.26 PFLOPS peak MXFP4 compute. A full Helios rack delivers 2.9 exaFLOPS FP4 throughput, 31TB total HBM4, 1.7PB/s memory bandwidth, 260TB/s scale-up and 43TB/s scale-out bandwidth, securing top-tier AI rack performance.
Open standards define Helios end-to-end, including UALoE intra-rack fabric, Ultra Ethernet scale-out, OCP low-precision formats and Open Rack Wide chassis, plus fully open-source ROCm software. As an open reference design, it supports full hyperscaler customization of networking, power and management. Major adopters include OpenAI, Meta, Anthropic, Microsoft and Oracle.
AMD Instinct MI455X: CDNA 5 Flagship GPU
Packaged via TSMC CoWoS-L, the 320-billion-transistor MI455X integrates eight N2 XCDs, two N3 I/O dies, two N3 Fabric & Cache Dies (FCDs) and twelve HBM4 stacks. Its 2048-bit per-stack HBM4 interface delivers 23.3TB/s bandwidth, paired with dual 96MB FCD L2 caches hitting 54TB/s throughput.
I/O capabilities include 3.6TB/s bidirectional UALoE scale-up bandwidth, 256GB/s Infinity Fabric CPU-GPU linkage, and flexible scale-out via dual PCIe Gen6 x16 ports or three AI-NICs. It outperforms prior-gen AMD GPUs and NVIDIA’s Rubin/B300 across most key metrics.
Key Spec Comparison
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Specification
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AMD MI455X
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NVIDIA Rubin
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AMD MI355X
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NVIDIA B300
|
|
Architecture
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CDNA 5
|
Rubin
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CDNA 4
|
Blackwell Ultra
|
|
Transistors
|
320B
|
336B
|
185B
|
208B
|
|
HBM Capacity
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432GB HBM4
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288GB HBM4
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288GB HBM3E
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288GB HBM3E
|
|
HBM Bandwidth
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23.3TB/s
|
22TB/s
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8TB/s
|
8TB/s
|
|
Scale-up per GPU
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3.6TB/s
|
3.6TB/s
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1.08TB/s
|
1.8TB/s
|
|
Scale-out per GPU
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2400 Gb/s
|
1600 Gb/s
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400 Gb/s
|
800 Gb/s
|
|
CPU-GPU Link
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256GB/s Infinity Fabric
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1.8TB/s C2C
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PCIe 5
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900GB/s C2C
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The MI455X leads rivals in HBM capacity, memory bandwidth and scale-out throughput, matching Rubin’s scale-up performance via UALoE to close NVIDIA’s longstanding NVLink gap. NVIDIA’s stronger C2C CPU-GPU link remains its key hardware advantage, driving core platform differences.
Compute Throughput Comparison
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Precision Format
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AMD MI455X
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NVIDIA Rubin
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AMD MI355X
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NVIDIA B300
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|
MXFP4 / NVFP4
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40.26 PF
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35 PF
|
10.1 PF
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15 PF
|
|
MXFP6 / FP6
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20.13 PF
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17.5 PF
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10.1 PF
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5 PF
|
|
MXFP8 / FP8
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20.13 PF
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17.5 PF
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5 PF
|
5 PF
|
|
FP16 / BF16
|
5.03 PF
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4 PF
|
2.5 PF
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2.5 PF
|
|
FP32
|
315 TF
|
130 TF
|
157.3 TF
|
75 TF
|
Versus the MI355X, the MI455X quadruples low-precision throughput and doubles standard-precision performance. It outperforms B300 across all formats, leads Rubin by 15% in low precision and 26% in FP16/BF16, and delivers a 2.4x FP32 advantage critical for high-precision AI weights and HPC workloads.
CDNA 5 Architectural Upgrades
Retaining 8 XCDs and 256 execution units of CDNA 4, CDNA 5 overhauled internal compute structures. Each XCD splits into two Shader Engines with 16 active Work Group Processors (WGPs). Native Wave32 execution replaces Wave64, cutting divergence penalties, lowering register pressure and doubling per-WGP concurrent waves to 64 for better memory latency masking.
Redesigned SIMD units enable parallel execution, native BF16 acceleration and new tensor conversion instructions, with doubled transcendental throughput and native tanh support to boost transformer performance. A new per-WGP 5D Tensor Data Mover supports asynchronous tensor streaming, matching dedicated NVIDIA tensor accelerator capabilities.
Optimized Memory Hierarchy
CDNA 5 removed discrete per-XCD L2 and global Infinity Cache, adopting dual 96MB FCD-based L2 caches with 3x higher total bandwidth than CDNA 4. The unified coherent cache accelerates device atomics and delivers 4x effective read bandwidth via tensor multicasting.
Per-WGP on-chip storage doubled to 384KB, enabling full in-memory FlashAttention and MoE kernel residency. Upgraded 12×2048-bit HBM4 stacks drastically lift capacity and bandwidth, forming the foundation of the GPU’s AI performance edge.
GPU Partitioning & Virtualization
Dual-FCD design supports flexible NPS NUMA modes: unified full-GPU memory via NPS1, or two isolated low-latency domains with private L2 cache via NPS2. Configurable 1/2/4/8-way spatial segmentation and SR-IOV virtualization enable fine-grained, hardware-isolated multi-tenant GPU deployment.
AMD Helios Rack-Scale Platform
Helios uses AMD co-developed OCP Open Rack Wide chassis, holding 72 MI455X GPUs across 18 compute and 6 switch trays. The liquid-cooled rack consumes 225–245kW, with rear blind-mate cabling for tool-free hot-swap maintenance.
Compute Tray Design
Each tray pairs 4 MI455X GPUs with a 96-core 5GHz Venice SP7 CPU for 1:4 coherent CPU-GPU connectivity via Infinity Fabric. Socketed SP7 hardware supports upgrades to 256-core standard or cache-optimized Venice-X CPUs, with up to 4TB DRAM and 1.6TB/s memory bandwidth per tray.
Three independent networks serve each tray: a 400G Salina DPU for front-end datacenter access; 3 Vulcano 800G NICs per GPU for 2400Gb/s CPU-bypassed scale-out bandwidth; and 36 UALoE links per GPU for 3.6TB/s rack-wide shared-memory scale-up bandwidth.
Switch Fabric & Reliability
Helios employs 12 Broadcom Tomahawk 6 switches — one-third of NVIDIA’s NVSwitch count — delivering full per-GPU 3.6TB/s scale-up bandwidth via standard L2 Ethernet. Its single-tier all-to-all topology guarantees uniform low latency across all GPUs.
The 12-plane fabric supports graceful performance degradation and automatic traffic rerouting during hardware faults. Hardware-isolated, AES-256-encrypted Virtual Pods (vPods) enable flexible multi-tenant partitioning, confining failures to individual pods and supporting deployment modes from full-rack training to fine-grained GPU slicing.
Management Stack
AMD Fabric Manager (AFM) delivers zero-touch rack provisioning, vPod orchestration and fault recovery via redundant distributed controllers. Built on Kubernetes architecture and open SONiC OS with upstreamed UALoE support, it provides full observability and standard API integration with cluster schedulers.
Helios vs. NVIDIA Vera Rubin NVL72
Helios outperforms NVL72 with 50% higher total HBM (31TB vs 20.7TB), 50% faster per-GPU scale-out bandwidth and equivalent scale-up throughput with fewer switch components. AMD testing records 10–15% higher per-GPU token throughput and up to 30% better token-per-dollar efficiency on Kimi K2 workloads.
Architectural tradeoffs define the two platforms: Helios’ GPU-direct NICs eliminate CPU forwarding latency, while NVIDIA’s NICs rely on Vera CPU C2C links, causing bandwidth contention. NVIDIA leads in native GPUDirect Storage and user-friendly DOCA software, while AMD’s P4-programmable DPU favors hyperscale custom network development.
Helios’ biggest advantage is full customer customizability across CPUs, memory, networking and power budgets, versus NVIDIA’s fixed superchip configuration.
DPU & ROCm.AI Software Ecosystem
The 400G Salina DPU provides programmable SDN, security offloading and NVMe-over-Fabrics virtualization. Its unique KV cache offload compensates for the lack of native GPUDirect Storage by spilling excess AI cache to external storage at line rate.
Launched in August, ROCm.AI delivers 3.3x inference and 2.4x training gains over ROCm 7 via AI developer tools, autonomous Hyperloom optimization and FlyDSL low-level control. AMD’s published real-world metrics hit 50% of the MI455X’s peak FP4 throughput.
MXFP4 and NVFP4 adopt different scaling mechanisms, making vendor peak FLOPS comparisons less reliable than application-level token throughput, with ample room for further ROCm optimization in production deployments.
Conclusion
Helios establishes AMD as a direct rival to NVIDIA’s flagship AI rack systems, offering industry-leading HBM capacity, superior scale-out networking, cost-effective open hardware and full customer customizability. Backed by major hyperscaler adoption, a clear 2027–2028 GPU roadmap and maturing ROCm software, AMD has built competitive end-to-end AI infrastructure to challenge NVIDIA’s longstanding rack-scale dominance.
Beijing Qianxing Jietong Technology Co., Ltd.
Sandy Yang/Global Strategy Director
WhatsApp / WeChat: +86 13426366826
Email: yangyd@qianxingdata.com
Website: www.qianxingdata.com/www.storagesserver.com
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Sandy Yang/Global Strategy Director
WhatsApp / WeChat: +86 13426366826
Email: yangyd@qianxingdata.com
Website: www.qianxingdata.com/www.storagesserver.com
Business Focus:
ICT Product Distribution/System Integration & Services/Infrastructure Solutions
With 20+ years of IT distribution experience, we partner with leading global brands to deliver reliable products and professional services.
“Using Technology to Build an Intelligent World”Your Trusted ICT Product Service Provider!